Design Summary: "run_benchmark"

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Full run_benchmark Metrics

- units import_verilog0 syn0 floorplan0 place0 cts0 route0 write_gds0 write_data0
errors 0 0 0 0 0 0 0 0
warnings 183 119 41 42 40 40 0 40
drvs --- --- --- 0 0 53 --- 58
drcs --- --- --- --- --- 0 --- ---
unconstrained --- --- 860 860 860 860 --- 860
cellarea um^2 --- 618.411 607.826 642.570 642.570 642.570 --- 642.570
totalarea um^2 --- --- 1536.950 1536.950 1536.950 1536.950 --- 1536.950
utilization % --- --- 39.547 41.808 41.808 41.808 --- 41.808
logicdepth --- --- 0 0 0 0 --- 0
peakpower mw --- --- 0.001 0.001 0.001 0.001 --- 0.001
leakagepower mw --- --- 0.001 0.001 0.001 0.001 --- 0.001
irdrop mv --- --- --- --- --- --- --- 0.003
holdpaths --- --- --- 0 0 0 --- 0
setuppaths --- --- --- 0 0 0 --- 0
macros --- --- 0 0 0 0 --- 0
cells --- 4822 4901 4926 4926 4926 --- 4926
registers --- 733 733 733 733 733 --- 733
buffers --- --- 33 58 58 58 --- 58
inverters --- --- 358 358 358 358 --- 358
pins --- 354 354 354 354 354 --- 354
nets --- 5788 4934 4959 4959 4959 --- 4959
vias --- --- --- --- --- 42330 --- ---
wirelength um --- --- --- --- --- 14991.000 --- ---
memory B 293.082M 170.426M 518.375M 1.993G 570.547M 5.893G 587.270M 712.715M
exetime s 09.119 10.529 09.939 33.969 14.380 52.700 04.910 58.799
tasktime s 09.665 14.763 11.636 35.222 15.160 53.482 07.348 01:00.313
totaltime s 09.665 24.428 36.065 01:11.288 01:26.449 02:19.931 02:28.107 03:21.072
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Metrics for run_benchmark Tasks

Toggle import_verilog0 Metrics
errors warnings drvs drcs unconstrained cellarea totalarea utilization logicdepth peakpower leakagepower irdrop holdpaths setuppaths macros cells registers buffers inverters pins nets vias wirelength memory exetime tasktime totaltime
0 183 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 293.082MB 09.119s 09.665s 09.665s
Toggle syn0 Metrics
errors warnings drvs drcs unconstrained cellarea totalarea utilization logicdepth peakpower leakagepower irdrop holdpaths setuppaths macros cells registers buffers inverters pins nets vias wirelength memory exetime tasktime totaltime
0 119 --- --- --- 618.411um^2 --- --- --- --- --- --- --- --- --- 4822 733 --- --- 354 5788 --- --- 170.426MB 10.529s 14.763s 24.428s
Toggle floorplan0 Metrics
errors warnings drvs drcs unconstrained cellarea totalarea utilization logicdepth peakpower leakagepower irdrop holdpaths setuppaths macros cells registers buffers inverters pins nets vias wirelength memory exetime tasktime totaltime
0 41 --- --- 860 607.826um^2 1536.950um^2 39.547% 0 0.001mw 0.001mw --- --- --- 0 4901 733 33 358 354 4934 --- --- 518.375MB 09.939s 11.636s 36.065s
Toggle place0 Metrics
errors warnings drvs drcs unconstrained cellarea totalarea utilization logicdepth peakpower leakagepower irdrop holdpaths setuppaths macros cells registers buffers inverters pins nets vias wirelength memory exetime tasktime totaltime
0 42 0 --- 860 642.570um^2 1536.950um^2 41.808% 0 0.001mw 0.001mw --- 0 0 0 4926 733 58 358 354 4959 --- --- 1.993GB 33.969s 35.222s 01:11.288s
Toggle cts0 Metrics
errors warnings drvs drcs unconstrained cellarea totalarea utilization logicdepth peakpower leakagepower irdrop holdpaths setuppaths macros cells registers buffers inverters pins nets vias wirelength memory exetime tasktime totaltime
0 40 0 --- 860 642.570um^2 1536.950um^2 41.808% 0 0.001mw 0.001mw --- 0 0 0 4926 733 58 358 354 4959 --- --- 570.547MB 14.380s 15.160s 01:26.449s
Toggle route0 Metrics
errors warnings drvs drcs unconstrained cellarea totalarea utilization logicdepth peakpower leakagepower irdrop holdpaths setuppaths macros cells registers buffers inverters pins nets vias wirelength memory exetime tasktime totaltime
0 40 53 0 860 642.570um^2 1536.950um^2 41.808% 0 0.001mw 0.001mw --- 0 0 0 4926 733 58 358 354 4959 42330 14991.000um 5.893GB 52.700s 53.482s 02:19.931s
Toggle write_gds0 Metrics
errors warnings drvs drcs unconstrained cellarea totalarea utilization logicdepth peakpower leakagepower irdrop holdpaths setuppaths macros cells registers buffers inverters pins nets vias wirelength memory exetime tasktime totaltime
0 0 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 587.270MB 04.910s 07.348s 02:28.107s
Toggle write_data0 Metrics
errors warnings drvs drcs unconstrained cellarea totalarea utilization logicdepth peakpower leakagepower irdrop holdpaths setuppaths macros cells registers buffers inverters pins nets vias wirelength memory exetime tasktime totaltime
0 40 58 --- 860 642.570um^2 1536.950um^2 41.808% 0 0.001mw 0.001mw 0.003mv 0 0 0 4926 733 58 358 354 4959 --- --- 712.715MB 58.799s 01:00.313s 03:21.072s
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